Example embodiments relate to a semiconductor package. In particular, exemplary embodiments relate, to a semiconductor package including a package substrate having an improved power-transmission property.
Advanced semiconductor fabrication technology makes it possible to continuously increase density and speed of semiconductor chips and reduce operation voltages of semiconductor chips. Accordingly, the number of pads on the semiconductor chip may be increased to several hundreds or thousands. However, to reduce power consumption, a power supplied to the semiconductor chip needs to be being reduced. Therefore, a noise margin becomes lower as the number of pads is increased. If the noise margin is lowered, overall performance of the system deteriorates.
The noise margin may strongly affect performance of a semiconductor system. For the system, a simultaneous switching noise (SSN) may originate from a package and a printed circuit board. The SSN can be reduced using many power/ground cells. However, since using many power/ground cells increases the chip size and package fabrication cost, this approach is not ideal.